Job Description

• Develop top-down mixed signal verification strategies for state-of-the-art SoCs, ASICs, and IP blocks containing high speed digital circuits and sensitive analog/RF circuits.

• Development of automated test benches and simulation result evaluation tools for top-down block verification.

• Perform actual verification work using the test benches and strategies developed.

• Development of tools for automated generation of verification reports and regression management.

• Integration and support of analog and digital designers developing Verilog-A, behavioral models into full system verification suites.

• Ensure validity and optimize performance of designer behavioral models. Ensure correct use of connect modules.

• Work with system architect to develop system tests, stimulating SoC from IC boundary, to ensure functionality with all types of data in all modes of operation.

• Develop automatic regression of verification suites using Cadence AMS Designer verification flow in Xcelium

We are a company committed to creating diverse and inclusive environments where people can bring their full, authentic selves to work every day. We are an equal opportunity/affirmative action employer that believes everyone matters. Qualified candidates will receive consideration for employment regardless of their race, color, ethnicity, religion, sex (including pregnancy), sexual orientation, gender identity and expression, marital status, national origin, ancestry, genetic factors, age, disability, protected veteran status, military or uniformed service member status, or any other status or characteristic protected by applicable laws, regulations, and ordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application or recruiting process, please send a request to HR@insightglobal.com .

To learn more about how we collect, keep, and process your private information, please review Insight Global's Workforce Privacy Policy: https://insightglobal.com/workforce-privacy-policy/ .

Skills and Requirements

• Master's Degree in EE or ECE

• More than 2 years of experience with an Analog Design Flow (e.g. Cadence Virtuoso, Incisive/Xcelium, AMS-Designer, Verilog-AMS and Spectre).

• Experience with modeling languages: Verilog-A, Verilog-AMS, SystemVerilog/UVM.

• Experience with scripting languages such as Python, PERL, TCL, BASH/TCSH, etc. Matlab exposure beneficial.

• Knowledge creating mixed-signal self-checking test benches that run under automatic regression.

• Comfort working across both analog and digital design paradigms.

• Experience verifying ASICs utilizing power gating and multiple clock and power domains is desirable

• General understanding of analog circuits and ability to fit analog behavioral models.

• Self-driven, able to work independently while coordinating with analog and digital block designers

• External applicants must be current US residents with valid US work authorization to be considered. null

We are a company committed to creating diverse and inclusive environments where people can bring their full, authentic selves to work every day. We are an equal employment opportunity/affirmative action employer that believes everyone matters. Qualified candidates will receive consideration for employment without regard to race, color, ethnicity, religion,sex (including pregnancy), sexual orientation, gender identity and expression, marital status, national origin, ancestry, genetic factors, age, disability, protected veteran status, military oruniformed service member status, or any other status or characteristic protected by applicable laws, regulations, andordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application or the recruiting process, please send a request to HR@insightglobal.com.