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Intel Standard Cell Design Engineer in Santa Clara, California

Job Description

Responsibilities are the following but not limited to:

  • Define, build, and evaluate standard cell circuit and/or standard cell layout to meet design requirements such as power, performance and area

  • Drive transistor level circuit design and performance analysis.

  • Library characterization for timing, noise, power and variation models

  • Work with customers to understand physical requirements and integrate ideas to meet performance, power, and area goals.

  • Work with process technology teams to define and refine process requirements for standard cell design.

  • Verify standard cell circuits for functionality, performance, and power.

This is an entry level position and compensation will be given accordingly.

#DesignEnablement

Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates.

Knowledge and/or experience listed below would be obtained through a combination of your schoolwork and/or classes and/or research and/or relevant previous job and/or internship experiences.

Minimum Qualifications:

Candidate must possess a MS degree with 6+ months of experience in Electrical Engineering or Computer Engineering or related field.

Experience/coursework in the following:

  • VLSI design.

  • Digital circuit design.

Preferred Qualifications:

Experience in the following:

  • Standard cell circuit and layout design, including CMOS combinational logic and sequential standard cells.

  • Industry-standard design automation tools for one or more of the following areas: circuit simulation, cell characterization, synthesis, place and route, physical design verification and reliability verification.

  • Scripting (TCL, Perl,Python) for design automation.

  • Linux environment and its development tools.

Inside this Business Group

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.

Other Locations

US, Folsom

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here. (https://jobs.intel.com/en/benefits)

Annual Salary Range for jobs which could be performed in US, California: $91,500.00-$137,436.00

*Salary range dependent on a number of factors including location and experience

Working Model

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

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